Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\apic\apic.c Create Date:2022-07-28 08:26:38
Last Modify:2020-03-16 21:21:31 Copyright©Brick
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Name:reserve_eilvt_offset

Proto:static unsigned int reserve_eilvt_offset(int offset, unsigned int new)

Type:unsigned int

Parameter:

TypeParameterName
intoffset
unsigned intnew
405  If offset >= APIC_EILVT_NR_MAX Then Return ~0
408  rsvd = atomic_read( & Setup extended LVT, AMD specific* Software should use the LVT offsets the BIOS provides. The offsets* are determined by the subsystems using it like those for MCE* threshold or IBS. On K8 only offset 0 (APIC500) and MCE interrupts* are supported[offset])
409  Do
410  vector = rsvd & ~APIC_EILVT_MASKED
411  If vector && Not eilvt_entry_is_changeable(vector, new) Then Return rsvd
414  rsvd = atomic_cmpxchg( & Setup extended LVT, AMD specific* Software should use the LVT offsets the BIOS provides. The offsets* are determined by the subsystems using it like those for MCE* threshold or IBS. On K8 only offset 0 (APIC500) and MCE interrupts* are supported[offset], rsvd, new)
415  When rsvd != new cycle
417  rsvd &= ~APIC_EILVT_MASKED
418  If rsvd && rsvd != vector Then pr_info("LVT offset %d assigned for vector 0x%02x\n", offset, rsvd)
422  Return new
Caller
NameDescribe
setup_APIC_eilvtIf mask=1, the LVT entry does not generate interrupts while mask=0* enables the vector. See also the BKDGs. Must be called with* preemption disabled.