Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\apic\apic.c Create Date:2022-07-28 08:27:11
Last Modify:2020-03-16 21:21:31 Copyright©Brick
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Name:setup_local_APIC - setup the local APIC* Used to setup local APIC while initializing BSP or bringing up APs.* Always called with preemption disabled.

Proto:static void setup_local_APIC(void)

Type:void

Parameter:Nothing

1600  cpu = smp_processor_id()
1603  If disable_apic Then
1604  disable_ioapic_support()
1605  Return
1612  value = apic_read(APIC_SPIV)
1613  value &= ~APIC_SPIV_APIC_ENABLED
1614  apic_write(APIC_SPIV, value)
1618  If Check, if the APIC is integrated or a separate chip && disable_esr Then
1619  apic_write(APIC_ESR, 0)
1620  apic_write(APIC_ESR, 0)
1621  apic_write(APIC_ESR, 0)
1622  apic_write(APIC_ESR, 0)
1629  BUG_ON(!apic_id_registered())
1636  init_apic_ldr()
1639  If dest_logical is used by the IPI functions Then
1647  logical_apicid = early_per_cpu(On x86_32, the mapping between cpu and logical apicid may vary* depending on apic in use. The following early percpu variable is* used for the mapping. This is where the behaviors of x86_64 and 32* actually diverge. Let's keep it ugly for now., cpu)
1648  ldr_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR))
1649  If logical_apicid != BAD_APICID Then WARN_ON(logical_apicid != ldr_apicid)
1652  early_per_cpu(On x86_32, the mapping between cpu and logical apicid may vary* depending on apic in use. The following early percpu variable is* used for the mapping. This is where the behaviors of x86_64 and 32* actually diverge. Let's keep it ugly for now., cpu) = ldr_apicid
1662  value = apic_read(APIC_TASKPRI)
1663  value &= ~APIC_TPRI_MASK
1664  value |= 0x10
1665  apic_write(APIC_TASKPRI, value)
1668  After a crash, we no longer service the interrupts and a pending* interrupt from previous kernel might still have ISR bit set
1673  value = apic_read(APIC_SPIV)
1674  value &= ~APIC_VECTOR_MASK
1678  value |= APIC_SPIV_APIC_ENABLED
1705  value &= ~APIC_SPIV_FOCUS_DISABLED
1711  value |= Special IRQ vectors used by the SMP architecture, 0xf0-0xff* some of the following vectors are 'rare', they are merged* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.* TLB, reschedule and local APIC vectors are performance-critical.
1712  apic_write(APIC_SPIV, value)
1714  perf_events_lapic_init()
1726  value = apic_read(APIC_LVT0) & APIC_LVT_MASKED
1727  If Not cpu && ( pic_mode || Not value || skip_ioapic_setup) Then
1728  value = APIC_DM_EXTINT
1729  Define the default level of output to be very little* This can be turned up by using apic=verbose for more* information and apic=debug for _lots_ of information.* apic_verbosity is defined in apic.c(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu)
1730  Else
1731  value = APIC_DM_EXTINT | APIC_LVT_MASKED
1732  Define the default level of output to be very little* This can be turned up by using apic=verbose for more* information and apic=debug for _lots_ of information.* apic_verbosity is defined in apic.c(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu)
1734  apic_write(APIC_LVT0, value)
1740  If Not cpu && This variable controls which CPUs receive external NMIs. By default,* external NMIs are delivered only to the BSP. != APIC_EXTNMI_NONE || This variable controls which CPUs receive external NMIs. By default,* external NMIs are delivered only to the BSP. == APIC_EXTNMI_ALL Then value = APIC_DM_NMI
1743  Else value = APIC_DM_NMI | APIC_LVT_MASKED
1747  If Not Check, if the APIC is integrated or a separate chip Then value |= APIC_LVT_LEVEL_TRIGGER
1749  apic_write(APIC_LVT1, value)
Caller
NameDescribe
apic_ap_setupAPIC setup function for application processors. Called from smpboot.c
apic_bsp_setup