Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\apic\io_apic.c Create Date:2022-07-28 08:29:32
Last Modify:2020-03-16 21:24:45 Copyright©Brick
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Name:clear_IO_APIC_pin

Proto:static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)

Type:void

Parameter:

TypeParameterName
unsigned intapic
unsigned intpin
550  entry = ioapic_read_entry(apic, pin)
551  If 000: FIXED * 001: lowest prio * 111: ExtINT == dest_SMI Then Return
558  If 0: enabled, 1: disabled == IOAPIC_UNMASKED Then
559  0: enabled, 1: disabled = IOAPIC_MASKED
560  ioapic_write_entry(apic, pin, entry)
561  entry = ioapic_read_entry(apic, pin)
564  If irr Then
572  If 0: edge, 1: level == IOAPIC_EDGE Then
573  0: edge, 1: level = IOAPIC_LEVEL
574  ioapic_write_entry(apic, pin, entry)
576  raw_spin_lock_irqsave( & ioapic_lock, flags)
577  IO-APIC versions below 0x20 don't support EOI register
578  raw_spin_unlock_irqrestore( & ioapic_lock, flags)
585  When we mask an IO APIC routing entry, we need to write the low* word first, in order to set the mask bit before we change the* high bits!
586  entry = ioapic_read_entry(apic, pin)
587  If irr Then pr_err("Unable to reset IRR for apic: %d, pin :%d\n", mpc_ioapic_id(apic), pin)
Caller
NameDescribe
clear_IO_APIC
unlock_ExtINT_logicThis looks a bit hackish but it's about the only one way of sending* a few INTA cycles to 8259As and any associated glue logic
check_timerThis code may look a bit paranoid, but it's supposed to cooperate with* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ* is so screwy. Thanks to Brian Perkins for testing/hacking this beast* fanatically on his truly buggy board.