Function report | 
Source Code:arch\x86\kernel\apic\io_apic.c | 
Create Date:2022-07-28 08:29:39 | 
| Last Modify:2020-03-16 21:24:45 | Copyright©Brick | 
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Name:irq_trigger
Proto:static int irq_trigger(int idx)
Type:int
Parameter:
| Type | Parameter | Name | 
|---|---|---|
| int | idx | 
| 852 | Case & == MP_IRQTRIG_DEFAULT | 
| 856 | Else trigger = PCI interrupts are always active low level triggered,* when listed as conforming in the MP table. (idx) | 
| 859 | Return eisa_irq_trigger(idx, bus, trigger) | 
| 860 | Case & == MP_IRQTRIG_EDGE | 
| 861 | Return IOAPIC_EDGE | 
| 862 | Case & == MP_IRQTRIG_RESERVED | 
| 863 | pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n") | 
| 865 | Case & == MP_IRQTRIG_LEVEL | 
| 866 | Default | 
| 867 | Return IOAPIC_LEVEL | 
| Name | Describe | 
|---|---|
| check_timer | This code may look a bit paranoid, but it's supposed to cooperate with* a wide range of boards and BIOS bugs. Fortunately only the timer IRQ* is so screwy. Thanks to Brian Perkins for testing/hacking this beast* fanatically on his truly buggy board. | 
| acpi_get_override_irq | 
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