Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\cacheinfo.c Create Date:2022-07-28 07:54:01
Last Modify:2020-03-16 20:07:28 Copyright©Brick
home page Tree
Annotation kernel can get tool activityDownload SCCTChinese

Name:init_intel_cacheinfo

Proto:void init_intel_cacheinfo(struct cpuinfo_x86 *c)

Type:void

Parameter:

TypeParameterName
struct cpuinfo_x86 *c
724  trace = 0 , l1i = 0 , l1d = 0 , l2 = 0 , l3 = 0
725  new_l1d = 0 , new_l1i = 0
726  new_l2 = 0 , new_l3 = 0
727  l2_id = 0 , l3_id = 0
732  If Maximum supported CPUID level, -1=no CPUID: > 3 Then
735  If is_initialized == 0 Then
737  num_cache_leaves = find_num_cache_leaves(c)
738  is_initialized++
745  When i < num_cache_leaves cycle
746  struct _cpuid4_info_regs this_leaf = {}
749  retval = cpuid4_cache_lookup_regs(i, & this_leaf)
750  If retval < 0 Then Continue
754  Case level == 1
755  If type == CTYPE_DATA Then new_l1d = size / 1024
757  Else if type == CTYPE_INST Then new_l1i = size / 1024
759  Break
760  Case level == 2
761  new_l2 = size / 1024
762  num_threads_sharing = 1 + num_threads_sharing
763  index_msb = get_count_order(num_threads_sharing)
764  l2_id = apicid & ~((1 << index_msb) - 1)
765  Break
766  Case level == 3
767  new_l3 = size / 1024
768  num_threads_sharing = 1 + num_threads_sharing
769  index_msb = get_count_order(num_threads_sharing)
770  l3_id = apicid & ~((1 << index_msb) - 1)
771  Break
772  Default
773  Break
781  If ( num_cache_leaves == 0 || CPU family == 15 ) && Maximum supported CPUID level, -1=no CPUID: > 1 Then
785  dp = regs
786  only_trace = 0
788  If num_cache_leaves != 0 && CPU family == 15 Then only_trace = 1
792  n = CPUID functions returning a single datum & 0xFF
794  When i < n cycle
795  cpuid(2, & regs[0], & regs[1], & regs[2], & regs[3])
798  When j < 3 cycle If regs[j] & 1 << 31 Then
800  regs[j] = 0
803  When j < 16 cycle
804  des = dp[j]
805  k = 0
808  When descriptor != 0 cycle
809  If descriptor == des Then
810  If only_trace && cache_type != LVL_TRACE Then Break
813  Case cache_type == LVL_1_INST
814  l1i += size
815  Break
816  Case cache_type == LVL_1_DATA
817  l1d += size
818  Break
819  Case cache_type == LVL_2
820  l2 += size
821  Break
822  Case cache_type == LVL_3
823  l3 += size
824  Break
825  Case cache_type == LVL_TRACE
826  trace += size
827  Break
830  Break
833  k++
839  If new_l1d Then l1d = new_l1d
842  If new_l1i Then l1i = new_l1i
845  If new_l2 Then
846  l2 = new_l2
852  If new_l3 Then
853  l3 = new_l3
871  KB - valid for CPUS which support this call: = If l3 Then l3 Else If l2 Then l2 Else l1i + l1d
873  If Not l2 Then cpu_detect_cache_sizes(c)
Caller
NameDescribe
init_intel
init_centaur
init_zhaoxin