mce_rdmsrl

Name:MSR access wrappers used for error injection

Proto:static u64 mce_rdmsrl(unsigned int msr)

Type:u64

Parameter:

Type	Parameter	Name
unsigned int	msr

396

If Operations for contexts that are safe from preemption/interrupts. These* operations verify that preemption is disabled.(finished) Then

397

offset = Support code for software error injection

399

If offset < 0 Then Return 0

401

Return *(this_cpu_ptr( & injectm) + offset)

404

If rdmsrl_safe(msr, & v) Then

405

WARN_ONCE(1, "mce: Unable to read MSR 0x%x!\n", msr)

411

v = 0

414

Return v

**Caller**
Name	Describe
mce_gather_info	Collect all global (w.r.t. this processor) status about this machine* check into our "mce" struct so that we can use it later to assess* the severity of the problem as we read per-bank specific details.
mce_read_aux	Read ADDR and MISC registers.
machine_check_poll	Poll for corrected events or events that happened before reset.* Those are just logged through /dev/mcelog.* This is executed in standard interrupt context.* Note: spec recommends to panic for fatal unsignalled* errors here
mce_no_way_out	Do a quick check if any of the events requires a panic.* This decides if we keep the events around or clear them.
__mc_check_crashing_cpu	Cases where we avoid rendezvous handler timeout:* 1) If this CPU is offline
__mc_scan_banks

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