Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:arch\x86\kernel\cpu\mce\therm_throt.c Create Date:2022-07-28 08:04:23
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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Name:intel_init_thermal

Proto:void intel_init_thermal(struct cpuinfo_x86 *c)

Type:void

Parameter:

TypeParameterName
struct cpuinfo_x86 *c
645  cpu = smp_processor_id()
646  tm2 = 0
649  If Not Thermal monitoring depends on APIC, ACPI and clock modulation Then Return
657  Access to machine-specific registers (available on 586 and better only)* Note: the rd* operations modify the parameters directly (without using* pointer indirection), this allows gcc to optimize better(MSR_IA32_MISC_ENABLE, l, h)
659  h = lvtthmr_init
670  If (h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED Then apic_write(APIC_LVTTHMR, lvtthmr_init)
674  If l & MSR_IA32_MISC_ENABLE_TM1 && h & APIC_DM_SMI Then
675  If Values used for system_state. Ordering of the states must not be changed* as code checks for <, <=, >, >= STATE. == SYSTEM_BOOTING Then pr_debug("CPU%d: Thermal monitoring handled by SMI\n", cpu)
677  Return
681  If cpu_has(c, Thermal Monitor 2 ) Then
682  If CPU family == 6 && ( x86_model == 9 || x86_model == 13 ) Then
683  Access to machine-specific registers (available on 586 and better only)* Note: the rd* operations modify the parameters directly (without using* pointer indirection), this allows gcc to optimize better(MSR_THERM2_CTL, l, h)
684  If l & MSR_THERM2_CTL_TM_SELECT Then tm2 = 1
686  Else if l & MSR_IA32_MISC_ENABLE_TM2 Then tm2 = 1
691  h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED
692  apic_write(APIC_LVTTHMR, h)
694  Access to machine-specific registers (available on 586 and better only)* Note: the rd* operations modify the parameters directly (without using* pointer indirection), this allows gcc to optimize better(MSR_IA32_THERM_INTERRUPT, l, h)
695  If cpu_has(c, Intel Power Limit Notification ) && Not int_pln_enable Then wrmsr(MSR_IA32_THERM_INTERRUPT, (l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h)
699  Else if cpu_has(c, Intel Power Limit Notification ) && int_pln_enable Then wrmsr(MSR_IA32_THERM_INTERRUPT, l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h)
703  Else wrmsr(MSR_IA32_THERM_INTERRUPT, l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h)
707  If cpu_has(c, Intel Package Thermal Status ) Then
708  Access to machine-specific registers (available on 586 and better only)* Note: the rd* operations modify the parameters directly (without using* pointer indirection), this allows gcc to optimize better(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h)
709  If cpu_has(c, Intel Power Limit Notification ) && Not int_pln_enable Then wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, (l | (PACKAGE_THERM_INT_LOW_ENABLE | PACKAGE_THERM_INT_HIGH_ENABLE)) & ~PACKAGE_THERM_INT_PLN_ENABLE, h)
714  Else if cpu_has(c, Intel Power Limit Notification ) && int_pln_enable Then wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l | (PACKAGE_THERM_INT_LOW_ENABLE | PACKAGE_THERM_INT_HIGH_ENABLE | PACKAGE_THERM_INT_PLN_ENABLE), h)
719  Else wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l | (PACKAGE_THERM_INT_LOW_ENABLE | PACKAGE_THERM_INT_HIGH_ENABLE), h)
725  smp_thermal_vector = Thermal transition interrupt handler
727  Access to machine-specific registers (available on 586 and better only)* Note: the rd* operations modify the parameters directly (without using* pointer indirection), this allows gcc to optimize better(MSR_IA32_MISC_ENABLE, l, h)
728  wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h)
730  pr_info_once("CPU0: Thermal monitoring enabled (%s)\n", tm2 ? "TM2" : "TM1")
734  atomic_set( & therm_throt_en, 1)
Caller
NameDescribe
mce_intel_feature_init